k3q ym notes: 1. built with adjacent die from a single wafer. 2. device mounted on fr5 pcb: 1.0 x 0.75 x 0.62 in.; pad layout as shown on suggested pad layout document ap020 01, which can be found on our website at http://www.diodes.com/datasheets/ap02001.pdf. 3. for packaging details, go to our website at http://www.diodes.com/datasheets/ap02007.pdf. 4. for lead free version (with lead free terminal finish) part number, please add "-f" suffix to part number above. example: DMMT3906-7-f. marking information ds30293 rev. 2 - 2 1 of 3 DMMT3906 www.diodes.com diodes incorporated maximum ratings @ t a = 25 c unless otherwise specified a m j l f d b c h k c 1 c 2 e 1 nc e 2 b 1,2 mechanical data case: sot-26, molded plastic case material - ul flammability rating classification 94v-0 terminals: solderable per mil-std-202, method 208 also available in lead free plating (matte tin finish). please see ordering information, note 4, below terminal connections: see diagram marking: k3q weight: 0.015 grams (approx.) ordering information: see below DMMT3906 matched pnp small signal surface mount transistor characteristic symbol DMMT3906 unit collector-base voltage v cbo -40 v collector-emitter voltage v ceo -40 v emitter-base voltage v ebo -5.0 v collector current - continuous i c -200 ma power dissipation (note 2) p d 225 mw thermal resistance, junction to ambient (note 2) r ja 556 c/w operating and storage and temperature range t j ,t stg -55 to +150 c sot-26 dim min max typ a 0.35 0.50 0.38 b 1.50 1.70 1.60 c 2.70 3.00 2.80 d 0.95 f 0.55 h 2.90 3.10 3.00 j 0.013 0.10 0.05 k 1.00 1.30 1.10 l 0.35 0.55 0.40 m 0.10 0.20 0.15 all dimensions in mm t c u d o r p w e n month jan feb march apr may jun jul aug sep oct nov dec code 1234567 89 o nd year 1998 1999 2000 2001 2002 2003 2004 code jklm n op date code key k3q = product type marking code ym = date code marking y = year ex: n = 2002 m = month ex: 9 = september device packaging shipping DMMT3906-7 sot-26 3000/tape & reel (note 3) ordering information features epitaxial planar die construction intrinsically matched pnp pair (note 1) small surface mount package 2% h fe matched tolerance 1% h fe matched tolerance on request also available in lead free version
ds30293 rev. 2 - 2 2 of 3 DMMT3906 www.diodes.com electrical characteristics @ t a = 25 c unless otherwise specified characteristic symbol min max unit test condition off characteristics (note 5) collector-base breakdown voltage v (br)cbo -40 v i c = -10 a, i e = 0 collector-emitter breakdown voltage v (br)ceo -40 v i c = -1.0ma, i b = 0 emitter-base breakdown voltage v (br)ebo -5.0 v i e = -10 a, i c = 0 collector cutoff current i cex -50 na v ce = -30v, v eb(off) = -3.0v base cutoff current i bl -50 na v ce = -30v, v eb(off) = -3.0v on characteristics (note 5) dc current gain (note 6) h fe 60 80 100 60 30 300 i c = -100a, v ce = -1.0v i c = -1.0ma, v ce = -1.0v i c = -10ma, v ce = -1.0v i c = -50ma, v ce = -1.0v i c = -100ma, v ce = -1.0v collector-emitter saturation voltage v ce(sat) -0.25 -0.40 v i c = -10ma, i b = -1.0ma i c = -50ma, i b = -5.0ma base-emitter saturation voltage v be(sat) -0.65 -0.85 -0.95 v i c = -10ma, i b = -1.0ma i c = -50ma, i b = -5.0ma small signal characteristics output capacitance c obo 4.5 pf v cb = -5.0v, f = 1.0mhz, i e = 0 input capacitance c ibo 10 pf v eb = -0.5v, f = 1.0mhz, i c = 0 input impedance h ie 2.0 12 k v ce = 10v, i c = 1.0ma, f = 1.0khz voltage feedback ratio h re 0.1 10 x 10 -4 small signal current gain h fe 100 400 output admittance h oe 3.0 60 s current gain-bandwidth product f t 250 mhz v ce = -20v, i c = -10ma, f = 100mhz noise figure nf 4.0 db v ce = -5.0v, i c = -100 a, r s = 1.0k f = 1.0khz switching characteristics delay time t d 35 ns v cc = -3.0v, i c = -10ma, v be(off) = 0.5v, i b1 = -1.0ma rise time t r 35 ns storage time t s 225 ns v cc = -3.0v, i c = -10ma, i b1 = i b2 = -1.0ma fall time t f 75 ns notes: 5. short duration test pulse used to minimize self-heating effect. 6. the dc current gain, h fe , is matched at i c = -10ma and v ce = -1.0v with typical matched tolerances of 1% and maximum of 2%. t c u d o r p w e n
ds30293 rev. 2 - 2 3 of 3 DMMT3906 www.diodes.com 0.5 0.6 0.7 0.8 0.9 1 . 0 110100 v , base-emitter (v) be(sat) saturation voltage i , collector current (ma) c fig. 5, typical base-emitter saturation volta g e vs. collector current i c i b =10 0.01 0.1 10 1 1 10 100 1000 v , collector-emitter (v) ce(sat) saturation voltage i , collector current (ma) c fig. 4, typical collector-emitter saturation voltage vs. collector current i c i b = 10 1 10 1000 100 0.1 1 10 1000 100 h , dc current gain fe i , collector current (ma) c fig. 3, typical dc current gain vs collector current t = -25c a t = +25c a t = 125c a v = 1.0v ce 1 100 10 0.1 1 10 100 c , input capacitance (pf) ibo c , output capacitance (pf) obo v , collector-base voltage (v) cb fig. 2, input and output capacitance vs. collector-base volta g e f= 1mhz cibo cobo 0 50 100 25 50 75 100 125 150 175 200 p , power dissipation (mw) d t , ambient temperature (c) a fig. 1, max power dissipation vs ambient tem p erature 150 200 250 300 350 0 t c u d o r p w e n
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